parent
e6aa0cbd80
commit
11eaf34d91
2 changed files with 37 additions and 4 deletions
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@ -616,7 +616,15 @@ void MatrixPanel_I2S_DMA::clearFrameBuffer(bool _buff_id){
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// fill all x_pixels except color_index[0] (LSB) ones, this also clears all color data to 0's black
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// fill all x_pixels except color_index[0] (LSB) ones, this also clears all color data to 0's black
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do {
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do {
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--x_pixel;
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--x_pixel;
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row[x_pixel] = abcde;
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if ( m_cfg.driver == HUB75_I2S_CFG::SM5266P) {
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// modifications here for row shift register type SM5266P
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// https://github.com/mrfaptastic/ESP32-HUB75-MatrixPanel-I2S-DMA/issues/164
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row[x_pixel] = abcde & (0x18 << BITS_ADDR_OFFSET); // mask out the bottom 3 bits which are the clk di bk inputs
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} else {
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row[x_pixel] = abcde;
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}
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} while(x_pixel!=dma_buff.rowBits[row_idx]->width);
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} while(x_pixel!=dma_buff.rowBits[row_idx]->width);
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// color_index[0] (LSB) x_pixels must be "marked" with a previous's row address, 'cause it is used to display
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// color_index[0] (LSB) x_pixels must be "marked" with a previous's row address, 'cause it is used to display
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@ -624,9 +632,34 @@ void MatrixPanel_I2S_DMA::clearFrameBuffer(bool _buff_id){
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abcde = ((ESP32_I2S_DMA_STORAGE_TYPE)row_idx-1) << BITS_ADDR_OFFSET;
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abcde = ((ESP32_I2S_DMA_STORAGE_TYPE)row_idx-1) << BITS_ADDR_OFFSET;
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do {
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do {
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--x_pixel;
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--x_pixel;
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row[x_pixel] = abcde;
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if ( m_cfg.driver == HUB75_I2S_CFG::SM5266P) {
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// modifications here for row shift register type SM5266P
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// https://github.com/mrfaptastic/ESP32-HUB75-MatrixPanel-I2S-DMA/issues/164
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row[x_pixel] = abcde & (0x18 << BITS_ADDR_OFFSET); // mask out the bottom 3 bits which are the clk di bk inputs
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} else {
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row[x_pixel] = abcde;
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}
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//row[x_pixel] = abcde;
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} while(x_pixel);
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} while(x_pixel);
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// modifications here for row shift register type SM5266P
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// https://github.com/mrfaptastic/ESP32-HUB75-MatrixPanel-I2S-DMA/issues/164
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if ( m_cfg.driver == HUB75_I2S_CFG::SM5266P) {
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uint16_t serialCount;
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uint16_t latch;
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x_pixel = dma_buff.rowBits[row_idx]->width - 16; // come back 8*2 pixels to allow for 8 writes
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serialCount = 8;
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do{
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serialCount--;
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latch = row[x_pixel] | (((((ESP32_I2S_DMA_STORAGE_TYPE)row_idx) % 8) == serialCount) << 1) << BITS_ADDR_OFFSET; // data on 'B'
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row[x_pixel++] = latch| (0x05<< BITS_ADDR_OFFSET); // clock high on 'A'and BK high for update
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row[x_pixel++] = latch| (0x04<< BITS_ADDR_OFFSET); // clock low on 'A'and BK high for update
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} while (serialCount);
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} // end SM5266P
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// let's set LAT/OE control bits for specific pixels in each color_index subrows
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// let's set LAT/OE control bits for specific pixels in each color_index subrows
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uint8_t coloridx = dma_buff.rowBits[row_idx]->color_depth;
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uint8_t coloridx = dma_buff.rowBits[row_idx]->color_depth;
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do {
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do {
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@ -229,7 +229,7 @@ struct HUB75_I2S_CFG {
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* Enumeration of hardware-specific chips
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* Enumeration of hardware-specific chips
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* used to drive matrix modules
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* used to drive matrix modules
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*/
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*/
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enum shift_driver {SHIFTREG=0, FM6124, FM6126A, ICN2038S, MBI5124};
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enum shift_driver {SHIFTREG=0, FM6124, FM6126A, ICN2038S, MBI5124, SM5266P};
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/**
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/**
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* I2S clock speed selector
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* I2S clock speed selector
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