diff --git a/src/platforms/esp32s3/gdma_lcd_parallel16.cpp b/src/platforms/esp32s3/gdma_lcd_parallel16.cpp
index 6daedba..d773b55 100644
--- a/src/platforms/esp32s3/gdma_lcd_parallel16.cpp
+++ b/src/platforms/esp32s3/gdma_lcd_parallel16.cpp
@@ -135,7 +135,7 @@
     }
      ESP_LOGI("S3", "Clock divider is %d", LCD_CAM.lcd_clock.lcd_clkm_div_num);   
 
-	 ESP_LOGD("S3", "Resulting output clock frequency: %d Mhz",  (160000000L/LCD_CAM.lcd_clock.lcd_clkm_div_num)); 
+	 ESP_LOGD("S3", "Resulting output clock frequency: %ld Mhz",  (160000000L/LCD_CAM.lcd_clock.lcd_clkm_div_num)); 
 
     
     LCD_CAM.lcd_clock.lcd_clkm_div_a = 1;     // 0/1 fractional divide
@@ -463,4 +463,4 @@
   } // end flip
 
 
-#endif
\ No newline at end of file
+#endif