Fix ESP_LOG statements
Correct int width specifier
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8e6c69716c
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9940c078bd
2 changed files with 16 additions and 16 deletions
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@ -199,8 +199,8 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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////////////////////////////// Clock configuration //////////////////////////////
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////////////////////////////// Clock configuration //////////////////////////////
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auto freq = (_cfg.bus_freq);
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unsigned int freq = (_cfg.bus_freq);
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ESP_LOGD("ESP32/S2", "Requested output clock frequency: %ld Mhz", (freq/1000000));
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ESP_LOGD("ESP32/S2", "Requested output clock frequency: %u Mhz", (unsigned int)((freq/1000000));
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// What is the current CPU frequency?
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// What is the current CPU frequency?
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@ -214,7 +214,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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// I2S_CLKM_DIV_NUM 2=40MHz / 3=27MHz / 4=20MHz / 5=16MHz / 8=10MHz / 10=8MHz
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// I2S_CLKM_DIV_NUM 2=40MHz / 3=27MHz / 4=20MHz / 5=16MHz / 8=10MHz / 10=8MHz
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//auto _div_num = std::min(255u, 1 + ((pll_160M_clock_d2) / (1 + freq)));
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//auto _div_num = std::min(255u, 1 + ((pll_160M_clock_d2) / (1 + freq)));
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auto _div_num = 160000000L / freq / i2s_parallel_get_memory_width(ESP32_I2S_DEVICE, 16); // 16 bits in parallel
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unsigned int _div_num = (unsigned int) (160000000L / freq / i2s_parallel_get_memory_width(ESP32_I2S_DEVICE, 16)); // 16 bits in parallel
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if(_div_num < 2 || _div_num > 0xFF) {
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if(_div_num < 2 || _div_num > 0xFF) {
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// return ESP_ERR_INVALID_ARG;
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// return ESP_ERR_INVALID_ARG;
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@ -222,7 +222,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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}
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}
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ESP_LOGD("ESP32", "i2s pll_160M_clock_d2 clkm_div_num is: %d", _div_num);
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ESP_LOGD("ESP32", "i2s pll_160M_clock_d2 clkm_div_num is: %u", _div_num);
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// I2S_CLK_SEL Set this bit to select I2S module clock source.
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// I2S_CLK_SEL Set this bit to select I2S module clock source.
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// 0: No clock. 1: APLL_CLK. 2: PLL_160M_CLK. 3: No clock. (R/W)
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// 0: No clock. 1: APLL_CLK. 2: PLL_160M_CLK. 3: No clock. (R/W)
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@ -233,7 +233,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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dev->clkm_conf.clk_en = 1;
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dev->clkm_conf.clk_en = 1;
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// Calc
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// Calc
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auto output_freq = (160000000L/_div_num);
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unsigned int output_freq = (unsigned int)(160000000L/_div_num);
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// Calculate clock divider for Original ESP32
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// Calculate clock divider for Original ESP32
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#else
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#else
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@ -249,7 +249,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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// I2S_CLKM_DIV_NUM 2=40MHz / 3=27MHz / 4=20MHz / 5=16MHz / 8=10MHz / 10=8MHz
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// I2S_CLKM_DIV_NUM 2=40MHz / 3=27MHz / 4=20MHz / 5=16MHz / 8=10MHz / 10=8MHz
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//auto _div_num = std::min(255u, 1 + ((pll_d2_clock) / (1 + freq)));
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//auto _div_num = std::min(255u, 1 + ((pll_d2_clock) / (1 + freq)));
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auto _div_num = 80000000L / freq / i2s_parallel_get_memory_width(ESP32_I2S_DEVICE, 16); // 16 bits in parallel
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unsigned int _div_num = (unsigned int) (80000000L / freq / i2s_parallel_get_memory_width(ESP32_I2S_DEVICE, 16)); // 16 bits in parallel
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if(_div_num < 2 || _div_num > 0xFF) {
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if(_div_num < 2 || _div_num > 0xFF) {
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// return ESP_ERR_INVALID_ARG;
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// return ESP_ERR_INVALID_ARG;
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_div_num = 4;
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_div_num = 4;
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@ -257,20 +257,20 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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///auto _div_num = 80000000L/freq;
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///auto _div_num = 80000000L/freq;
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ESP_LOGD("ESP32", "i2s pll_d2_clock clkm_div_num is: %ld", _div_num);
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ESP_LOGD("ESP32", "i2s pll_d2_clock clkm_div_num is: %u", _div_num);
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dev->clkm_conf.clka_en=1; // Use the 80mhz system clock (PLL_D2_CLK) when '0'
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dev->clkm_conf.clka_en=1; // Use the 80mhz system clock (PLL_D2_CLK) when '0'
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dev->clkm_conf.clkm_div_a = 1; // Clock denominator
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dev->clkm_conf.clkm_div_a = 1; // Clock denominator
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dev->clkm_conf.clkm_div_b = 0; // Clock numerator
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dev->clkm_conf.clkm_div_b = 0; // Clock numerator
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dev->clkm_conf.clkm_div_num = _div_num;
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dev->clkm_conf.clkm_div_num = _div_num;
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auto output_freq = (80000000L/_div_num);
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unsigned int output_freq = (unsigned int)(80000000L/_div_num);
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#endif
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#endif
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output_freq = output_freq + 0; // work around arudino 'unused var' issue if debug isn't enabled.
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output_freq = output_freq + 0; // work around arudino 'unused var' issue if debug isn't enabled.
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ESP_LOGI("ESP32/S2", "Output frequency is %ld Mhz??", (output_freq/1000000/i2s_parallel_get_memory_width(ESP32_I2S_DEVICE, 16)));
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ESP_LOGI("ESP32/S2", "Output frequency is %u Mhz??", (unsigned int)(output_freq/1000000/i2s_parallel_get_memory_width(ESP32_I2S_DEVICE, 16)));
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// Setup i2s clock
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// Setup i2s clock
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@ -428,7 +428,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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_dmadesc_count = len;
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_dmadesc_count = len;
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_dmadesc_last = len-1;
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_dmadesc_last = len-1;
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ESP_LOGI("ESP32/S2", "Allocating memory for %d DMA descriptors.", len);
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ESP_LOGI("ESP32/S2", "Allocating memory for %d DMA descriptors.", (int)len);
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_dmadesc_a= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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_dmadesc_a= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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@ -458,7 +458,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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_dmadesc_a_idx = 0;
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_dmadesc_a_idx = 0;
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_dmadesc_b_idx = 0;
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_dmadesc_b_idx = 0;
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ESP_LOGD("ESP32/S2", "Allocating %d bytes of memory for DMA descriptors.", sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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ESP_LOGD("ESP32/S2", "Allocating %d bytes of memory for DMA descriptors.", (int)sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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// New - Temporary blank descriptor for transitions between DMA buffer
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// New - Temporary blank descriptor for transitions between DMA buffer
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_dmadesc_blank = (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * 1, MALLOC_CAP_DMA);
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_dmadesc_blank = (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * 1, MALLOC_CAP_DMA);
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@ -488,7 +488,7 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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if ( !dmadesc_b )
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if ( !dmadesc_b )
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{
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{
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if ( (_dmadesc_a_idx+1) > _dmadesc_count) {
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if ( (_dmadesc_a_idx+1) > _dmadesc_count) {
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ESP_LOGE("ESP32/S2", "Attempted to create more DMA descriptors than allocated memory for. Expecting a maximum of %ld DMA descriptors", _dmadesc_count);
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ESP_LOGE("ESP32/S2", "Attempted to create more DMA descriptors than allocated memory for. Expecting a maximum of %u DMA descriptors", (unsigned int)_dmadesc_count);
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return;
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return;
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}
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}
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}
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}
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@ -146,8 +146,8 @@
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}
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}
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ESP_LOGI("S3", "Clock divider is %d", LCD_CAM.lcd_clock.lcd_clkm_div_num);
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ESP_LOGI("S3", "Clock divider is %d", (int)LCD_CAM.lcd_clock.lcd_clkm_div_num);
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ESP_LOGD("S3", "Resulting output clock frequency: %ld Mhz", (160000000L/LCD_CAM.lcd_clock.lcd_clkm_div_num));
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ESP_LOGD("S3", "Resulting output clock frequency: %d Mhz", (int)(160000000L/LCD_CAM.lcd_clock.lcd_clkm_div_num));
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LCD_CAM.lcd_clock.lcd_clkm_div_a = 1; // 0/1 fractional divide
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LCD_CAM.lcd_clock.lcd_clkm_div_a = 1; // 0/1 fractional divide
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@ -311,7 +311,7 @@
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if (_dmadesc_a) heap_caps_free(_dmadesc_a); // free all dma descrptios previously
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if (_dmadesc_a) heap_caps_free(_dmadesc_a); // free all dma descrptios previously
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_dmadesc_count = len;
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_dmadesc_count = len;
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ESP_LOGD("S3", "Allocating %d bytes memory for DMA descriptors.", sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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ESP_LOGD("S3", "Allocating %d bytes memory for DMA descriptors.", (int)sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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_dmadesc_a= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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_dmadesc_a= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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@ -374,7 +374,7 @@
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if ( _dmadesc_a_idx >= _dmadesc_count)
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if ( _dmadesc_a_idx >= _dmadesc_count)
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{
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{
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ESP_LOGE("S3", "Attempted to create more DMA descriptors than allocated. Expecting max %" PRIu32 " descriptors.", _dmadesc_count);
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ESP_LOGE("S3", "Attempted to create more DMA descriptors than allocated. Expecting max %u descriptors.", (unsigned int)_dmadesc_count);
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return;
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return;
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}
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}
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