diff --git a/esp32_i2s_parallel_v2.c b/esp32_i2s_parallel_v2.c
index 6c030f5..469fef5 100644
--- a/esp32_i2s_parallel_v2.c
+++ b/esp32_i2s_parallel_v2.c
@@ -208,10 +208,7 @@ esp_err_t i2s_parallel_driver_install(i2s_port_t port, i2s_parallel_config_t* co
   dev->sample_rate_conf.tx_bits_mod = bus_width;
   dev->sample_rate_conf.rx_bck_div_num = 1;
   dev->sample_rate_conf.tx_bck_div_num = 2; // datasheet says this must be 2 or greater (but 1 seems to work)
-                                            // note: because it's 1 here, not 2, we need to clkm_div_num = clkm_div_num * 2
 
-  // No support for fractional dividers (could probably be ported from official serial i2s driver though)
-  // 
   // It's confusing, but the max output the ESP32 can pump out when using I2S *parallel* output is 20Mhz.
   // https://easyvolts.com/2018/08/14/esp32-40msps-oscilloscope-project-is-closed-and-here-is-why/
   // and https://github.com/espressif/esp-idf/issues/2251
@@ -219,8 +216,6 @@ esp_err_t i2s_parallel_driver_install(i2s_port_t port, i2s_parallel_config_t* co
 
   // 16bit parallel I2S @ 10Mhz = calculated clk_div_main (per line ~142) of 4
   // 16bit parallel I2S @ 20Mhz = calculated clk_div_main (per line ~142) of 2
-
-  
   dev->clkm_conf.val=0;             // Clear the clkm_conf struct
   dev->clkm_conf.clka_en=0;         // Use the 160mhz system clock (PLL_D2_CLK) when '0'
   dev->clkm_conf.clkm_div_b=0;      // Page 310 of Technical Reference Manual - Clock numerator
@@ -233,8 +228,6 @@ esp_err_t i2s_parallel_driver_install(i2s_port_t port, i2s_parallel_config_t* co
   // Note: clkm_div_num must only be set here AFTER clkm_div_b, clkm_div_a, etc. Or weird things happen!
   dev->clkm_conf.clkm_div_num = clk_div_main;
   
-  //dev->clkm_conf.clkm_div_num=80000000L/(conf->sample_rate + 1);   
-   
   //printf("esp32_i2s_parallel_2.c > I2S clock divider is %d \n", clk_div_main*2);  
 
   // Some fifo conf I don't quite understand