ScStw/ESP32-HUB75-MatrixPanel-DMA
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Fix S2 compiling

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This commit is contained in:
mrfaptastic 2023-03-21 23:50:05 +00:00
parent 93b36adf72
commit bd7cc1e217
3 changed files with 30 additions and 26 deletions
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2
src/ESP32-HUB75-MatrixPanel-I2S-DMA.h
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@ -844,7 +844,7 @@ private:
frameStruct frame_buffer[2];
frameStruct *fb; // What framebuffer we are writing pixel changes to? (pointer to either frame_buffer[0] or frame_buffer[1] basically ) used within updateMatrixDMABuffer(...)
int back_buffer_id = 0; // If using double buffer, which one is NOT active (ie. being displayed) to write too?
volatile int back_buffer_id = 0; // If using double buffer, which one is NOT active (ie. being displayed) to write too?
int brightness = 128; // If you get ghosting... reduce brightness level. ((60/64)*255) seems to be the limit before ghosting on a 64 pixel wide physical panel for some panels.
int lsbMsbTransitionBit = 0; // For colour depth calculations

24
src/platforms/esp32/esp32_i2s_parallel_dma.cpp
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@ -38,9 +38,13 @@ Modified heavily for the ESP32 HUB75 DMA library by:
volatile bool previousBufferFree = true;
// Todo: handle IS20? (this is hard coded for I2S1 only)
static void IRAM_ATTR i2s_isr(void* arg) {
REG_WRITE(I2S_INT_CLR_REG(1), (REG_READ(I2S_INT_RAW_REG(1)) & 0xffffffc0) | 0x3f);
// From original Sprite_TM Code
//REG_WRITE(I2S_INT_CLR_REG(1), (REG_READ(I2S_INT_RAW_REG(1)) & 0xffffffc0) | 0x3f);
// Clear flag so we can get retriggered
SET_PERI_REG_BITS(I2S_INT_CLR_REG(ESP32_I2S_DEVICE), I2S_OUT_EOF_INT_CLR_V, 1, I2S_OUT_EOF_INT_CLR_S);
// at this point, the previously active buffer is free, go ahead and write to it
previousBufferFree = true;
@ -370,26 +374,22 @@ bool DRAM_ATTR i2s_parallel_is_previous_buffer_free() {
dev->timing.val = 0;
/* If we have double buffering, then allocate an interrupt service routine function
* that can be used for I2S0/I2S1 created interrupts.
*/
// If we have double buffering, then allocate an interrupt service routine function
// that can be used for I2S0/I2S1 created interrupts.
// setup I2S Interrupt
SET_PERI_REG_BITS(I2S_INT_ENA_REG(1), I2S_OUT_EOF_INT_ENA_V, 1, I2S_OUT_EOF_INT_ENA_S);
// allocate a level 1 intterupt: lowest priority, as ISR isn't urgent and may take a long time to complete
//esp_intr_alloc(ETS_I2S1_INTR_SOURCE, (int)(ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1), i2s_isr, NULL, NULL);
// Setup I2S Interrupt
SET_PERI_REG_BITS(I2S_INT_ENA_REG(ESP32_I2S_DEVICE), I2S_OUT_EOF_INT_ENA_V, 1, I2S_OUT_EOF_INT_ENA_S);
// Allocate a level 1 intterupt: lowest priority, as ISR isn't urgent and may take a long time to complete
esp_intr_alloc(irq_source, (int)(ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1), i2s_isr, NULL, NULL);
#if defined (CONFIG_IDF_TARGET_ESP32S2)
ESP_LOGD("ESP32-S2", "init() GPIO and clock configuration set for ESP32-S2");
#else
ESP_LOGD("ESP32-ORIG", "init() GPIO and clock configuration set for ESP32");
#endif
return true;
}

10
src/platforms/esp32/esp32_i2s_parallel_dma.hpp
View file

@ -49,12 +49,16 @@ Contributors:
#define DMA_MAX (4096-4)
// DO NOT CHANGE
#define ESP32_I2S_DEVICE I2S_NUM_1
// The type used for this SoC
#define HUB75_DMA_DESCRIPTOR_T lldesc_t
#if defined (CONFIG_IDF_TARGET_ESP32S2)
#define ESP32_I2S_DEVICE I2S_NUM_0
#else
#define ESP32_I2S_DEVICE I2S_NUM_1
#endif
//----------------------------------------------------------------------------
void IRAM_ATTR irq_hndlr(void* arg);