commit
d345aaf8c4
3 changed files with 19 additions and 24 deletions
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@ -831,9 +831,12 @@ void MatrixPanel_I2S_DMA::hlineDMA(int16_t x_coord, int16_t y_coord, int16_t l,
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if ( !initialized )
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if ( !initialized )
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return;
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return;
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if ( x_coord < 0 || y_coord < 0 || l < 1 || x_coord >= PIXELS_PER_ROW || y_coord >= m_cfg.mx_height)
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if ( (x_coord + l) < 1 || y_coord < 0 || l < 1 || x_coord >= PIXELS_PER_ROW || y_coord >= m_cfg.mx_height)
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return;
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return;
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l = x_coord < 0 ? l+x_coord : l;
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x_coord = x_coord < 0 ? 0 : x_coord;
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l = ( (x_coord + l) >= PIXELS_PER_ROW ) ? (PIXELS_PER_ROW - x_coord):l;
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l = ( (x_coord + l) >= PIXELS_PER_ROW ) ? (PIXELS_PER_ROW - x_coord):l;
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@ -923,9 +926,12 @@ void MatrixPanel_I2S_DMA::vlineDMA(int16_t x_coord, int16_t y_coord, int16_t l,
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if ( !initialized )
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if ( !initialized )
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return;
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return;
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if ( x_coord < 0 || y_coord < 0 || l < 1 || x_coord >= PIXELS_PER_ROW || y_coord >= m_cfg.mx_height)
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if ( x_coord < 0 || (y_coord + l) < 1 || l < 1 || x_coord >= PIXELS_PER_ROW || y_coord >= m_cfg.mx_height)
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return;
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return;
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l = y_coord < 0 ? l+y_coord : l;
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y_coord = y_coord < 0 ? 0 : y_coord;
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// check for a length that goes beyond the height of the screen! Array out of bounds dma memory changes = screwed output #163
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// check for a length that goes beyond the height of the screen! Array out of bounds dma memory changes = screwed output #163
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l = ( (y_coord + l) >= m_cfg.mx_height ) ? (m_cfg.mx_height - y_coord):l;
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l = ( (y_coord + l) >= m_cfg.mx_height ) ? (m_cfg.mx_height - y_coord):l;
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//if (y_coord + l > m_cfg.mx_height)
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//if (y_coord + l > m_cfg.mx_height)
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@ -274,7 +274,7 @@ struct HUB75_I2S_CFG {
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bool clkphase;
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bool clkphase;
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// Minimum refresh / scan rate needs to be configured on start due to LSBMSB_TRANSITION_BIT calculation in allocateDMAmemory()
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// Minimum refresh / scan rate needs to be configured on start due to LSBMSB_TRANSITION_BIT calculation in allocateDMAmemory()
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uint8_t min_refresh_rate;
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uint16_t min_refresh_rate;
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// struct constructor
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// struct constructor
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HUB75_I2S_CFG (
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HUB75_I2S_CFG (
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@ -290,7 +290,7 @@ struct HUB75_I2S_CFG {
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clk_speed _i2sspeed = HZ_15M,
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clk_speed _i2sspeed = HZ_15M,
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uint8_t _latblk = DEFAULT_LAT_BLANKING, // Anything > 1 seems to cause artefacts on ICS panels
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uint8_t _latblk = DEFAULT_LAT_BLANKING, // Anything > 1 seems to cause artefacts on ICS panels
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bool _clockphase = true,
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bool _clockphase = true,
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uint8_t _min_refresh_rate = 60
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uint16_t _min_refresh_rate = 60
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) : mx_width(_w),
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) : mx_width(_w),
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mx_height(_h),
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mx_height(_h),
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chain_length(_chain),
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chain_length(_chain),
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@ -61,7 +61,7 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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void IRAM_ATTR irq_hndlr(void* arg) {
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void IRAM_ATTR irq_hndlr(void* arg) {
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// Clear flag so we can get retriggered
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// Clear flag so we can get retriggered
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//SET_PERI_REG_BITS(I2S_INT_CLR_REG(ESP32_I2S_DEVICE), I2S_OUT_EOF_INT_CLR_V, 1, I2S_OUT_EOF_INT_CLR_S);
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SET_PERI_REG_BITS(I2S_INT_CLR_REG(ESP32_I2S_DEVICE), I2S_OUT_EOF_INT_CLR_V, 1, I2S_OUT_EOF_INT_CLR_S);
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active_dma_buffer_output_count++;
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active_dma_buffer_output_count++;
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@ -636,40 +636,29 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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if ( current_back_buffer_id == 1) {
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if ( current_back_buffer_id == 1) {
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// _dmadesc_b is not visable, make it visible. Currently looping around _dmadesc_a
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// _dmadesc_b is not visable, make it visible. Currently looping around _dmadesc_a
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// GFX library is changing pixels of back buffer '1'
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// GFX library is changing pixels of back buffer '1'
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_dev->int_clr.out_eof = 1; // clear interrupt
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active_dma_buffer_output_count = 0;
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while (!active_dma_buffer_output_count) {}
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_dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0]; // Start sending out _dmadesc_b (or buffer 1)
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_dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0]; // Start sending out _dmadesc_b (or buffer 1)
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current_back_buffer_id = 0; // quickly update the library so it stops writing dirrectly to buffer 1!
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_dev->int_clr.out_eof = 1; // clear interrupt
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active_dma_buffer_output_count = 0;
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active_dma_buffer_output_count = 0;
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while (!active_dma_buffer_output_count) {}
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while (!active_dma_buffer_output_count) {}
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_dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0]; // get this preped for the next flip buffer
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//fix _dmadesc_ loop issue #407
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//need to connect the up comming _dmadesc_ not the old one
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_dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0];
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} else {
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} else {
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// current_back_buffer_id == 0
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// current_back_buffer_id == 0
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// we are currently active on _dmadesc_a. we want to flip across and loop _dmadesc_
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// we are currently active on _dmadesc_a. we want to flip across and loop _dmadesc_
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_dev->int_clr.out_eof = 1; // clear interrupt
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active_dma_buffer_output_count = 0;
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while (!active_dma_buffer_output_count) {}
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_dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0];
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_dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0];
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current_back_buffer_id = 1;
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_dev->int_clr.out_eof = 1; // clear interrupt
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active_dma_buffer_output_count = 0;
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active_dma_buffer_output_count = 0;
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while (!active_dma_buffer_output_count) {}
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while (!active_dma_buffer_output_count) {}
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_dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0];
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_dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0];
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}
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}
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// current_back_buffer_id ^= 1;
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current_back_buffer_id ^= 1;
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// Disable intterupt
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// Disable intterupt
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_dev->int_ena.out_eof = 0;
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_dev->int_ena.out_eof = 0;
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