ScStw/ESP32-HUB75-MatrixPanel-DMA
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Further changes to see if there's a solution to #402

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This commit is contained in:
mrfaptastic 2023-02-19 18:02:57 +10:00
parent b262ddeaa1
commit e19898280a
1 changed files with 11 additions and 8 deletions
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15
src/platforms/esp32/esp32_i2s_parallel_dma.cpp
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@ -633,13 +633,16 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
_dev->int_ena.out_eof = 1; // enable interrupt _dev->int_ena.out_eof = 1; // enable interrupt
if ( current_back_buffer_id == 1) { // _dmadesc_b is not visable, make it visible. Currently looping around _dmadesc_a if ( current_back_buffer_id == 1) {
// _dmadesc_b is not visable, make it visible. Currently looping around _dmadesc_a
// GFX library is changing pixels of back buffer '1'
_dev->int_clr.out_eof = 1; // clear interrupt _dev->int_clr.out_eof = 1; // clear interrupt
active_dma_buffer_output_count = 0; active_dma_buffer_output_count = 0;
while (!active_dma_buffer_output_count) {} while (!active_dma_buffer_output_count) {}
_dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0]; _dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0]; // Start sending out _dmadesc_b (or buffer 1)
current_back_buffer_id = 0; // quickly update the library so it stops writing dirrectly to buffer 1!
_dev->int_clr.out_eof = 1; // clear interrupt _dev->int_clr.out_eof = 1; // clear interrupt
active_dma_buffer_output_count = 0; active_dma_buffer_output_count = 0;
@ -647,15 +650,16 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
_dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0]; // get this preped for the next flip buffer _dmadesc_a[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0]; // get this preped for the next flip buffer
current_back_buffer_id = 0; } else {
// current_back_buffer_id == 0
} else { // we are currently active on _dmadesc_a. we want to flip across and loop _dmadesc_ // we are currently active on _dmadesc_a. we want to flip across and loop _dmadesc_
_dev->int_clr.out_eof = 1; // clear interrupt _dev->int_clr.out_eof = 1; // clear interrupt
active_dma_buffer_output_count = 0; active_dma_buffer_output_count = 0;
while (!active_dma_buffer_output_count) {} while (!active_dma_buffer_output_count) {}
_dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0]; _dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_a[0];
current_back_buffer_id = 1;
_dev->int_clr.out_eof = 1; // clear interrupt _dev->int_clr.out_eof = 1; // clear interrupt
active_dma_buffer_output_count = 0; active_dma_buffer_output_count = 0;
@ -663,7 +667,6 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
_dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0]; _dmadesc_b[_dmadesc_last].qe.stqe_next = &_dmadesc_b[0];
current_back_buffer_id = 1;
} }
// current_back_buffer_id ^= 1; // current_back_buffer_id ^= 1;