Update gdma_lcd_parallel16.cpp
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mrfaptastic
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c2885498ee
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ec290f3dba
1 changed files with 43 additions and 43 deletions
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@ -38,7 +38,7 @@
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// End-of-DMA-transfer callback
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IRAM_ATTR bool gdma_on_trans_eof_callback(gdma_channel_handle_t dma_chan,
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gdma_event_data_t *event_data, void *user_data) {
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// This DMA callback seems to trigger a moment before the last data has
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// issued (buffering between DMA & LCD peripheral?), so pause a moment
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// before stopping LCD data out. The ideal delay may depend on the LCD
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@ -51,9 +51,9 @@
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// the next transfer.
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//LCD_CAM.lcd_user.lcd_start = 0;
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previousBufferFree = true;
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previousBufferFree = true;
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return true;
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}
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@ -99,47 +99,47 @@
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// LCD_CAM_LCD_CLK_SEL Select LCD module source clock. 0: clock source is disabled. 1: XTAL_CLK. 2: PLL_D2_CLK. 3: PLL_F160M_CLK. (R/W)
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LCD_CAM.lcd_clock.lcd_clk_sel = 3; // Use 160Mhz Clock Source
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LCD_CAM.lcd_clock.lcd_ck_out_edge = 0; // PCLK low in 1st half cycle
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LCD_CAM.lcd_clock.lcd_ck_idle_edge = 0; // PCLK low idle
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LCD_CAM.lcd_clock.lcd_clkcnt_n = 1; // Should never be zero
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//LCD_CAM.lcd_clock.lcd_clk_equ_sysclk = 0; // PCLK = CLK / (CLKCNT_N+1)
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LCD_CAM.lcd_clock.lcd_clk_equ_sysclk = 1; // PCLK = CLK / 1 (... so 160Mhz still)
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LCD_CAM.lcd_clock.lcd_clkcnt_n = 1; // Should never be zero
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//LCD_CAM.lcd_clock.lcd_clk_equ_sysclk = 0; // PCLK = CLK / (CLKCNT_N+1)
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LCD_CAM.lcd_clock.lcd_clk_equ_sysclk = 1; // PCLK = CLK / 1 (... so 160Mhz still)
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// https://esp32.com/viewtopic.php?f=5&t=24459&start=80#p94487
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/* Re: ESP32-S3 LCD and I2S FULL documentation
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* by ESP_Sprite » Fri Mar 25, 2022 2:06 am
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// https://esp32.com/viewtopic.php?f=5&t=24459&start=80#p94487
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/* Re: ESP32-S3 LCD and I2S FULL documentation
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* by ESP_Sprite » Fri Mar 25, 2022 2:06 am
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*
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* Are you sure you are staying within the limits of the psram throughput? If GDMA can't fetch data fast
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* enough it leads to corruption. Also keep in mind that worst case scenario, the gdma can only use half of
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* the bandwidth of the psram peripheral (as it's round-robin shared with the CPUs).
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*/
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// Fastest speed I can get with Octoal PSRAM to work before nothing shows. Based on manual testing.
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// If using an ESP32-S3 with slower (half the bandwidth) Q-SPI (Quad), then the divisor will need to be '20' (8Mhz) which wil be flickery!
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* enough it leads to corruption. Also keep in mind that worst case scenario, the gdma can only use half of
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* the bandwidth of the psram peripheral (as it's round-robin shared with the CPUs).
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*/
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// Fastest speed I can get with Octoal PSRAM to work before nothing shows. Based on manual testing.
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// If using an ESP32-S3 with slower (half the bandwidth) Q-SPI (Quad), then the divisor will need to be '20' (8Mhz) which wil be flickery!
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if (_cfg.psram_clk_override)
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{
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ESP_LOGI("S3", "DMA buffer is on PSRAM. Limiting clockspeed....");
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//LCD_CAM.lcd_clock.lcd_clkm_div_num = 10; //16mhz is the fasted the Octal PSRAM can support it seems from faptastic's testing using an N8R8 variant (Octal SPI PSRAM).
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// https://github.com/mrfaptastic/ESP32-HUB75-MatrixPanel-DMA/issues/441#issuecomment-1513631890
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LCD_CAM.lcd_clock.lcd_clkm_div_num = 12; // 13Mhz is the fastest when the DMA memory is needed to service other peripherals as well.
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// https://github.com/mrfaptastic/ESP32-HUB75-MatrixPanel-DMA/issues/441#issuecomment-1513631890
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LCD_CAM.lcd_clock.lcd_clkm_div_num = 12; // 13Mhz is the fastest when the DMA memory is needed to service other peripherals as well.
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}
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else
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{
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auto freq = (_cfg.bus_freq);
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auto freq = (_cfg.bus_freq);
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auto _div_num = 8; // 20Mhz
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if (freq < 20000000L) {
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_div_num = 12; // 13Mhz
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}
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else if (freq > 20000000L) {
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_div_num = 6; // 26Mhz --- likely to have noise without a good connection
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}
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auto _div_num = 8; // 20Mhz
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if (freq < 20000000L) {
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_div_num = 12; // 13Mhz
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}
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else if (freq > 20000000L) {
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_div_num = 6; // 26Mhz --- likely to have noise without a good connection
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}
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//LCD_CAM.lcd_clock.lcd_clkm_div_num = lcd_clkm_div_num;
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LCD_CAM.lcd_clock.lcd_clkm_div_num = _div_num; //3;
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@ -163,8 +163,8 @@
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LCD_CAM.lcd_rgb_yuv.lcd_conv_bypass = 0; // Disable RGB/YUV converter
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LCD_CAM.lcd_misc.lcd_next_frame_en = 0; // Do NOT auto-frame
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LCD_CAM.lcd_misc.lcd_bk_en = 1; // https://esp32.com/viewtopic.php?t=24459&start=60#p91835
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LCD_CAM.lcd_misc.lcd_bk_en = 1; // https://esp32.com/viewtopic.php?t=24459&start=60#p91835
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LCD_CAM.lcd_data_dout_mode.val = 0; // No data delays
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LCD_CAM.lcd_user.lcd_always_out_en = 1; // Enable 'always out' mode
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LCD_CAM.lcd_user.lcd_8bits_order = 0; // Do not swap bytes
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@ -259,7 +259,7 @@
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// Enable DMA transfer callback
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static gdma_tx_event_callbacks_t tx_cbs = {
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// .on_trans_eof is literally the only gdma tx event type available
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// .on_trans_eof is literally the only gdma tx event type available
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.on_trans_eof = gdma_on_trans_eof_callback
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};
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gdma_register_tx_event_callbacks(dma_chan, &tx_cbs, NULL);
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@ -274,9 +274,9 @@
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// a clean start on the next LCD transfer:
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gdma_reset(dma_chan); // Reset DMA to known state
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esp_rom_delay_us(1000);
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LCD_CAM.lcd_user.lcd_dout = 1; // Enable data out
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LCD_CAM.lcd_user.lcd_update = 1; // Update registers
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LCD_CAM.lcd_user.lcd_dout = 1; // Enable data out
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LCD_CAM.lcd_user.lcd_update = 1; // Update registers
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LCD_CAM.lcd_misc.lcd_afifo_reset = 1; // Reset LCD TX FIFO
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@ -353,8 +353,8 @@
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{
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_dmadesc_b[_dmadesc_b_idx].dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA;
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//_dmadesc_b[_dmadesc_b_idx].dw0.suc_eof = 0;
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_dmadesc_b[_dmadesc_b_idx].dw0.suc_eof = (_dmadesc_b_idx == (_dmadesc_count-1));
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//_dmadesc_b[_dmadesc_b_idx].dw0.suc_eof = 0;
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_dmadesc_b[_dmadesc_b_idx].dw0.suc_eof = (_dmadesc_b_idx == (_dmadesc_count-1));
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_dmadesc_b[_dmadesc_b_idx].dw0.size = _dmadesc_b[_dmadesc_b_idx].dw0.length = size; //sizeof(data);
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_dmadesc_b[_dmadesc_b_idx].buffer = data; //data;
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@ -371,7 +371,7 @@
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}
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else
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{
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if ( _dmadesc_a_idx >= _dmadesc_count)
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{
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ESP_LOGE("S3", "Attempted to create more DMA descriptors than allocated. Expecting max %" PRIu32 " descriptors.", _dmadesc_count);
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@ -380,7 +380,7 @@
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_dmadesc_a[_dmadesc_a_idx].dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA;
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//_dmadesc_a[_dmadesc_a_idx].dw0.suc_eof = 0;
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_dmadesc_a[_dmadesc_a_idx].dw0.suc_eof = (_dmadesc_a_idx == (_dmadesc_count-1));
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_dmadesc_a[_dmadesc_a_idx].dw0.suc_eof = (_dmadesc_a_idx == (_dmadesc_count-1));
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_dmadesc_a[_dmadesc_a_idx].dw0.size = _dmadesc_a[_dmadesc_a_idx].dw0.length = size; //sizeof(data);
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_dmadesc_a[_dmadesc_a_idx].buffer = data; //data;
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@ -434,13 +434,13 @@
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}
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//current_back_buffer_id ^= 1;
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previousBufferFree = false;
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//while (i2s_parallel_is_previous_buffer_free() == false) {}
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while (!previousBufferFree);
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} // end flip
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