Fix to compile issues for PlatformIO
This commit is contained in:
parent
ce2b6264dd
commit
f9ff4b4078
3 changed files with 40 additions and 63 deletions
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@ -6,12 +6,6 @@
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#include "rom/cache.h"
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#endif
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extern Bus_Parallel16 dma_bus;
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#if CORE_DEBUG_LEVEL > 0
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static const char* TAG = "MatrixPanel";
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#endif
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/* This replicates same function in rowBitStruct, but due to induced inlining it might be MUCH faster
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* when used in tight loops while method from struct could be flushed out of instruction cache between
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* loop cycles do NOT forget about buff_id param if using this.
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@ -59,8 +53,8 @@ extern Bus_Parallel16 dma_bus;
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bool MatrixPanel_I2S_DMA::allocateDMAmemory()
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{
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ESP_LOGI(TAG, "Free heap: %d", heap_caps_get_free_size(MALLOC_CAP_INTERNAL));
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ESP_LOGI(TAG, "Free SPIRAM: %d", heap_caps_get_free_size(MALLOC_CAP_SPIRAM));
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ESP_LOGI("I2S-DMA", "Free heap: %d", heap_caps_get_free_size(MALLOC_CAP_INTERNAL));
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ESP_LOGI("I2S-DMA", "Free SPIRAM: %d", heap_caps_get_free_size(MALLOC_CAP_SPIRAM));
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// Alright, theoretically we should be OK, so let us do this, so
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@ -75,8 +69,8 @@ bool MatrixPanel_I2S_DMA::allocateDMAmemory()
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if (ptr->data == nullptr)
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{
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ESP_LOGE(TAG, "CRITICAL ERROR: Not enough memory for requested colour depth! Please reduce PIXEL_COLOUR_DEPTH_BITS value.\r\n");
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ESP_LOGE(TAG, "Could not allocate rowBitStruct %d!.\r\n", malloc_num);
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ESP_LOGE("I2S-DMA", "CRITICAL ERROR: Not enough memory for requested colour depth! Please reduce PIXEL_COLOUR_DEPTH_BITS value.\r\n");
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ESP_LOGE("I2S-DMA", "Could not allocate rowBitStruct %d!.\r\n", malloc_num);
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return false;
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// TODO: should we release all previous rowBitStructs here???
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@ -86,7 +80,7 @@ bool MatrixPanel_I2S_DMA::allocateDMAmemory()
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dma_buff.rowBits.emplace_back(ptr); // save new rowBitStruct into rows vector
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++dma_buff.rows;
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}
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ESP_LOGI(TAG, "Allocating %d bytes memory for DMA BCM framebuffer(s).", allocated_fb_memory);
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ESP_LOGI("I2S-DMA", "Allocating %d bytes memory for DMA BCM framebuffer(s).", allocated_fb_memory);
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// calculate the lowest LSBMSB_TRANSITION_BIT value that will fit in memory that will meet or exceed the configured refresh rate
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#if !defined(FORCE_COLOUR_DEPTH)
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@ -106,7 +100,7 @@ bool MatrixPanel_I2S_DMA::allocateDMAmemory()
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int actualRefreshRate = 1000000000UL/(nsPerFrame);
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calculated_refresh_rate = actualRefreshRate;
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ESP_LOGW(TAG, "lsbMsbTransitionBit of %d gives %d Hz refresh rate.", lsbMsbTransitionBit, actualRefreshRate);
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ESP_LOGW("I2S-DMA", "lsbMsbTransitionBit of %d gives %d Hz refresh rate.", lsbMsbTransitionBit, actualRefreshRate);
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if (actualRefreshRate > m_cfg.min_refresh_rate)
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break;
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@ -128,14 +122,14 @@ bool MatrixPanel_I2S_DMA::allocateDMAmemory()
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numDMAdescriptorsPerRow += (1<<(i - lsbMsbTransitionBit - 1));
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}
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ESP_LOGI(TAG, "Recalculated number of DMA descriptors per row: %d", numDMAdescriptorsPerRow);
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ESP_LOGI("I2S-DMA", "Recalculated number of DMA descriptors per row: %d", numDMAdescriptorsPerRow);
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// Refer to 'DMA_LL_PAYLOAD_SPLIT' code in configureDMA() below to understand why this exists.
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// numDMAdescriptorsPerRow is also used to calculate descount which is super important in i2s_parallel_config_t SoC DMA setup.
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if ( dma_buff.rowBits[0]->size() > DMA_MAX )
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{
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ESP_LOGW(TAG, "rowColorDepthStruct struct is too large, split DMA payload required. Adding %d DMA descriptors\n", PIXEL_COLOUR_DEPTH_BITS-1);
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ESP_LOGW("I2S-DMA", "rowColorDepthStruct struct is too large, split DMA payload required. Adding %d DMA descriptors\n", PIXEL_COLOUR_DEPTH_BITS-1);
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numDMAdescriptorsPerRow += PIXEL_COLOUR_DEPTH_BITS-1;
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// Note: If numDMAdescriptorsPerRow is even just one descriptor too large, DMA linked list will not correctly loop.
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@ -232,7 +226,7 @@ void MatrixPanel_I2S_DMA::configureDMA(const HUB75_I2S_CFG& _cfg)
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} // end frame rows
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ESP_LOGI(TAG, "%d DMA descriptors linked to buffer data.", current_dmadescriptor_offset);
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ESP_LOGI("I2S-DMA", "%d DMA descriptors linked to buffer data.", current_dmadescriptor_offset);
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//
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// Setup DMA and Output to GPIO
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@ -272,7 +266,7 @@ void MatrixPanel_I2S_DMA::configureDMA(const HUB75_I2S_CFG& _cfg)
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flipDMABuffer(); // display back buffer 0, draw to 1, ignored if double buffering isn't enabled.
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//i2s_parallel_send_dma(ESP32_I2S_DEVICE, &dmadesc_a[0]);
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ESP_LOGI(TAG, "DMA setup completed");
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ESP_LOGI("I2S-DMA", "DMA setup completed");
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} // end initMatrixDMABuff
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@ -491,7 +485,7 @@ void MatrixPanel_I2S_DMA::clearFrameBuffer(bool _buff_id){
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} else {
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row[ESP32_TX_FIFO_POSITION_ADJUST(x_pixel)] = abcde;
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}
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// ESP_LOGI(TAG, "x pixel 1: %d", x_pixel);
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// ESP_LOGI("", "x pixel 1: %d", x_pixel);
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} while(x_pixel!=dma_buff.rowBits[row_idx]->width && x_pixel);
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// colour_index[0] (LSB) x_pixels must be "marked" with a previous's row address, 'cause it is used to display
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@ -508,7 +502,7 @@ void MatrixPanel_I2S_DMA::clearFrameBuffer(bool _buff_id){
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row[ESP32_TX_FIFO_POSITION_ADJUST(x_pixel)] = abcde;
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}
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//row[x_pixel] = abcde;
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// ESP_LOGI(TAG, "x pixel 2: %d", x_pixel);
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// ESP_LOGI("", "x pixel 2: %d", x_pixel);
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} while(x_pixel);
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@ -22,10 +22,6 @@ Modified heavily for the ESP32 HUB75 DMA library by:
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#include <sdkconfig.h>
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#if defined (CONFIG_IDF_TARGET_ESP32) || defined (CONFIG_IDF_TARGET_ESP32S2)
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#if CORE_DEBUG_LEVEL > 0
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static const char* TAG = "esp32_i2s_parallel_dma";
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#endif
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#include "esp32_i2s_parallel_dma.hpp"
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#include <driver/gpio.h>
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@ -103,14 +99,14 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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void Bus_Parallel16::config(const config_t& cfg)
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{
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ESP_LOGI(TAG, "Performing config for ESP32 or ESP32-S2");
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ESP_LOGI("ESP32/S2", "Performing config for ESP32 or ESP32-S2");
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_cfg = cfg;
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_dev = getDev();
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}
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bool Bus_Parallel16::init(void) // The big one that gets everything setup.
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{
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ESP_LOGI(TAG, "Performing DMA bus init() for ESP32 or ESP32-S2");
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ESP_LOGI("ESP32/S2", "Performing DMA bus init() for ESP32 or ESP32-S2");
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if(_cfg.parallel_width < 8 || _cfg.parallel_width >= 24) {
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return false;
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@ -234,7 +230,7 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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return false;
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}
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ESP_LOGI(TAG, "i2s pll clk_div_main is: %d", _div_num);
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ESP_LOGI("ESP32/S2", "i2s pll clk_div_main is: %d", _div_num);
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dev->clkm_conf.clkm_div_b = 0; // Clock numerator
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@ -389,7 +385,7 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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irq_hndlr, NULL, NULL);
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if(err) {
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ESP_LOGE(TAG, "init() Failed to setup interrupt request handeler.");
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ESP_LOGE("ESP32/S2", "init() Failed to setup interrupt request handeler.");
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return false;
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}
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@ -399,9 +395,9 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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#if defined (CONFIG_IDF_TARGET_ESP32S2)
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ESP_LOGD(TAG, "init() GPIO and clock configuration set for ESP32-S2");
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ESP_LOGD("ESP32-S2", "init() GPIO and clock configuration set for ESP32-S2");
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#else
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ESP_LOGD(TAG, "init() GPIO and clock configuration set for ESP32");
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ESP_LOGD("ESP32-ORIG", "init() GPIO and clock configuration set for ESP32");
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#endif
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@ -439,13 +435,13 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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_dmadesc_count = len;
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_dmadesc_last = len-1;
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ESP_LOGI(TAG, "Allocating memory for %d DMA descriptors.", len);
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ESP_LOGI("ESP32/S2", "Allocating memory for %d DMA descriptors.", len);
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_dmadesc_a= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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if (_dmadesc_a == nullptr)
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{
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ESP_LOGE(TAG, "ERROR: Couldn't malloc _dmadesc_a. Not enough memory.");
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ESP_LOGE("ESP32/S2", "ERROR: Couldn't malloc _dmadesc_a. Not enough memory.");
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return false;
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}
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@ -454,13 +450,13 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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{
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if (_dmadesc_b) heap_caps_free(_dmadesc_b); // free all dma descrptios previously
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ESP_LOGD(TAG, "Allocating the second buffer (double buffer enabled).");
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ESP_LOGD("ESP32/S2", "Allocating the second buffer (double buffer enabled).");
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_dmadesc_b= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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if (_dmadesc_b == nullptr)
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{
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ESP_LOGE(TAG, "ERROR: Couldn't malloc _dmadesc_b. Not enough memory.");
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ESP_LOGE("ESP32/S2", "ERROR: Couldn't malloc _dmadesc_b. Not enough memory.");
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_double_dma_buffer = false;
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return false;
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}
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@ -469,7 +465,7 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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_dmadesc_a_idx = 0;
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_dmadesc_b_idx = 0;
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ESP_LOGD(TAG, "Allocating %d bytes of memory for DMA descriptors.", sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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ESP_LOGD("ESP32/S2", "Allocating %d bytes of memory for DMA descriptors.", sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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// New - Temporary blank descriptor for transitions between DMA buffer
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_dmadesc_blank = (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * 1, MALLOC_CAP_DMA);
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@ -489,20 +485,17 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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void Bus_Parallel16::create_dma_desc_link(void *data, size_t size, bool dmadesc_b)
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{
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static constexpr size_t MAX_DMA_LEN = (4096-4);
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/*
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if (dmadesc_b)
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ESP_LOGI(TAG, " * Double buffer descriptor.");
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*/
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if (size > MAX_DMA_LEN)
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{
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size = MAX_DMA_LEN;
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ESP_LOGW(TAG, "Creating DMA descriptor which links to payload with size greater than MAX_DMA_LEN!");
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ESP_LOGW("ESP32/S2", "Creating DMA descriptor which links to payload with size greater than MAX_DMA_LEN!");
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}
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if ( !dmadesc_b )
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{
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if ( (_dmadesc_a_idx+1) > _dmadesc_count) {
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ESP_LOGE(TAG, "Attempted to create more DMA descriptors than allocated memory for. Expecting a maximum of %d DMA descriptors", _dmadesc_count);
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ESP_LOGE("ESP32/S2", "Attempted to create more DMA descriptors than allocated memory for. Expecting a maximum of %d DMA descriptors", _dmadesc_count);
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return;
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}
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}
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@ -511,13 +504,6 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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volatile lldesc_t *next;
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bool eof = false;
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/*
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dmadesc_a[desccount-1].eof = 1;
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dmadesc_a[desccount-1].qe.stqe_next=(lldesc_t*)&dmadesc_a[0];
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*/
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// ESP_LOGI(TAG, "Creating descriptor %d\n", _dmadesc_a_idx);
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if ( (dmadesc_b == true) ) // for primary buffer
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{
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dmadesc = &_dmadesc_b[_dmadesc_b_idx];
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@ -535,7 +521,7 @@ static void IRAM_ATTR irq_hndlr(void* arg) { // if we use I2S1 (default)
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}
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if ( _dmadesc_a_idx == (_dmadesc_last) ) {
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ESP_LOGW(TAG, "Creating final DMA descriptor and linking back to 0.");
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ESP_LOGW("ESP32/S2", "Creating final DMA descriptor and linking back to 0.");
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}
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dmadesc->size = size;
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@ -26,9 +26,9 @@
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#include "gdma_lcd_parallel16.hpp"
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#include "esp_attr.h"
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#if CORE_DEBUG_LEVEL > 0
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static const char* TAG = "gdma_lcd_parallel16";
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#endif
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//#if (CORE_DEBUG_LEVEL > ARDUHAL_LOG_LEVEL_NONE) || (ARDUHAL_LOG_LEVEL > ARDUHAL_LOG_LEVEL_NONE)
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// static const char* TAG = "gdma_lcd_parallel16";
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//#endif
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static int _dmadesc_a_idx = 0;
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static int _dmadesc_b_idx = 0;
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@ -86,7 +86,7 @@
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esp_rom_delay_us(100);
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// uint32_t lcd_clkm_div_num = ((160000000 + 1) / _cfg.bus_freq);
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// ESP_LOGI(TAG, "Clock divider is %d", lcd_clkm_div_num);
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// ESP_LOGI("", "Clock divider is %d", lcd_clkm_div_num);
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// Configure LCD clock. Since this program generates human-perceptible
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// output and not data for LED matrices or NeoPixels, use almost the
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//LCD_CAM.lcd_clock.lcd_clkm_div_num = lcd_clkm_div_num;
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LCD_CAM.lcd_clock.lcd_clkm_div_num = 3;
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}
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ESP_LOGI(TAG, "Clock divider is %d", LCD_CAM.lcd_clock.lcd_clkm_div_num);
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ESP_LOGI("S3", "Clock divider is %d", LCD_CAM.lcd_clock.lcd_clkm_div_num);
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LCD_CAM.lcd_clock.lcd_clkm_div_a = 1; // 0/1 fractional divide
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@ -305,7 +305,7 @@
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void Bus_Parallel16::enable_double_dma_desc(void)
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{
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ESP_LOGI(TAG, "Enabled support for secondary DMA buffer.");
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ESP_LOGI("S3", "Enabled support for secondary DMA buffer.");
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_double_dma_buffer = true;
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}
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if (_dmadesc_a) heap_caps_free(_dmadesc_a); // free all dma descrptios previously
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_dmadesc_count = len;
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ESP_LOGD(TAG, "Allocating %d bytes memory for DMA descriptors.", sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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ESP_LOGD("S3", "Allocating %d bytes memory for DMA descriptors.", sizeof(HUB75_DMA_DESCRIPTOR_T) * len);
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_dmadesc_a= (HUB75_DMA_DESCRIPTOR_T*)heap_caps_malloc(sizeof(HUB75_DMA_DESCRIPTOR_T) * len, MALLOC_CAP_DMA);
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if (_dmadesc_a == nullptr)
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{
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ESP_LOGE(TAG, "ERROR: Couldn't malloc _dmadesc_a. Not enough memory.");
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ESP_LOGE("S3", "ERROR: Couldn't malloc _dmadesc_a. Not enough memory.");
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return false;
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}
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if (_dmadesc_b == nullptr)
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{
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ESP_LOGE(TAG, "ERROR: Couldn't malloc _dmadesc_b. Not enough memory.");
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ESP_LOGE("S3", "ERROR: Couldn't malloc _dmadesc_b. Not enough memory.");
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_double_dma_buffer = false;
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}
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}
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if (size > MAX_DMA_LEN) {
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size = MAX_DMA_LEN;
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ESP_LOGW(TAG, "Creating DMA descriptor which links to payload with size greater than MAX_DMA_LEN!");
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ESP_LOGW("S3", "Creating DMA descriptor which links to payload with size greater than MAX_DMA_LEN!");
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}
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if ( dmadesc_b == true)
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{
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// ESP_LOGI(TAG, "Creating dma desc B %d", _dmadesc_b_idx);
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_dmadesc_b[_dmadesc_b_idx].dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA;
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_dmadesc_b[_dmadesc_b_idx].dw0.suc_eof = 0;
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_dmadesc_b[_dmadesc_b_idx].dw0.size = _dmadesc_b[_dmadesc_b_idx].dw0.length = size; //sizeof(data);
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}
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else
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{
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// ESP_LOGI(TAG, "Creating dma desc A %d", _dmadesc_a_idx);
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if ( _dmadesc_a_idx >= _dmadesc_count)
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{
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ESP_LOGE(TAG, "Attempted to create more DMA descriptors than allocated. Expecting max %" PRIu32 " descriptors.", _dmadesc_count);
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ESP_LOGE("S3", "Attempted to create more DMA descriptors than allocated. Expecting max %" PRIu32 " descriptors.", _dmadesc_count);
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return;
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}
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