dorian/speedclock
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Change start sequence and start button ISR so that is not blocking the loop for about 3sec #7

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opened 2018-07-09 09:01:46 +02:00 by Fenoglio · 1 comment
Fenoglio commented 2018-07-09 09:01:46 +02:00 (Migrated from git.dorian.im)
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the current implementation of the start sequence is blocking the state loop for full time (about 3secs) because of pause handling (wait()) . This is not as it should work.
If the falsestart button ISR is handling the 3100ms delay (start sequnce duration) itself (isnstead of using the states)
AND
If the start sequnece is changed to use interrupt based timing OR tone pause function
this could be fixed that way the start sequnce is not blocking the loop.

Maybe there is no need to use timer interrupts if the falsestart ISR is handling the 3100ms start sequnce length itsself.

the current implementation of the start sequence is blocking the state loop for full time (about 3secs) because of pause handling (wait()) . This is not as it should work. If the falsestart button ISR is handling the 3100ms delay (start sequnce duration) itself (isnstead of using the states) AND If the start sequnece is changed to use interrupt based timing OR tone pause function this could be fixed that way the start sequnce is not blocking the loop. Maybe there is no need to use timer interrupts if the falsestart ISR is handling the 3100ms start sequnce length itsself.
Fenoglio commented 2018-07-09 09:24:56 +02:00 (Migrated from git.dorian.im)
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changed the description

changed the description
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Reference: dorian/speedclock#7
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