Fix arduino compile issue introduced in commit f970b78

This commit is contained in:
mrfaptastic 2023-03-12 09:49:16 +00:00
parent edfadc7650
commit 0e64e0d7a7
2 changed files with 22 additions and 20 deletions

View file

@ -238,36 +238,34 @@ struct HUB75_I2S_CFG {
*/ */
enum clk_speed {HZ_8M=8000000, HZ_10M=10000000, HZ_15M=15000000, HZ_20M=20000000}; enum clk_speed {HZ_8M=8000000, HZ_10M=10000000, HZ_15M=15000000, HZ_20M=20000000};
// Structure Variables
/** //
* GPIO pins mapping // Members must be in order of declaration or it breaks Arduino compiling due to strict checking.
*/ //
struct i2s_pins{
int8_t r1, g1, b1, r2, g2, b2, a, b, c, d, e, lat, oe, clk;
} gpio;
// Matrix driver chip type - default is a plain shift register
shift_driver driver;
// I2S clock speed
clk_speed i2sspeed;
// physical width of a single matrix panel module (in pixels, usually it is 64 ;) ) // physical width of a single matrix panel module (in pixels, usually it is 64 ;) )
uint16_t mx_width; uint16_t mx_width;
// physical height of a single matrix panel module (in pixels, usually almost always it is either 32 or 64) // physical height of a single matrix panel module (in pixels, usually almost always it is either 32 or 64)
uint16_t mx_height; uint16_t mx_height;
// number of chained panels regardless of the topology, default 1 - a single matrix module // number of chained panels regardless of the topology, default 1 - a single matrix module
uint16_t chain_length; uint16_t chain_length;
// Minimum refresh / scan rate needs to be configured on start due to LSBMSB_TRANSITION_BIT calculation in allocateDMAmemory() // GPIO Mapping
uint16_t min_refresh_rate; struct i2s_pins{ int8_t r1, g1, b1, r2, g2, b2, a, b, c, d, e, lat, oe, clk; } gpio;
// How many clock cycles to blank OE before/after LAT signal change, default is 1 clock // Matrix driver chip type - default is a plain shift register
uint8_t latch_blanking; shift_driver driver;
// use DMA double buffer (twice as much RAM required) // use DMA double buffer (twice as much RAM required)
bool double_buff; bool double_buff;
// I2S clock speed
clk_speed i2sspeed;
// How many clock cycles to blank OE before/after LAT signal change, default is 1 clock
uint8_t latch_blanking;
/** /**
* I2S clock phase * I2S clock phase
@ -285,6 +283,10 @@ struct HUB75_I2S_CFG {
*/ */
bool clkphase; bool clkphase;
// Minimum refresh / scan rate needs to be configured on start due to LSBMSB_TRANSITION_BIT calculation in allocateDMAmemory()
uint8_t min_refresh_rate;
// struct constructor // struct constructor
HUB75_I2S_CFG ( HUB75_I2S_CFG (
uint16_t _w = MATRIX_WIDTH, uint16_t _w = MATRIX_WIDTH,
@ -306,8 +308,8 @@ struct HUB75_I2S_CFG {
chain_length(_chain), chain_length(_chain),
gpio(_pinmap), gpio(_pinmap),
driver(_drv), driver(_drv),
i2sspeed(_i2sspeed),
double_buff(_dbuff), double_buff(_dbuff),
i2sspeed(_i2sspeed),
latch_blanking(_latblk), latch_blanking(_latblk),
clkphase(_clockphase), clkphase(_clockphase),
min_refresh_rate(_min_refresh_rate) min_refresh_rate(_min_refresh_rate)

View file

@ -30,7 +30,7 @@
#include <Fonts/FreeSansBold12pt7b.h> #include <Fonts/FreeSansBold12pt7b.h>
#endif #endif
#include <iostream> //#include <iostream>
struct VirtualCoords struct VirtualCoords
{ {