Fix arduino compile issue introduced in commit f970b78
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edfadc7650
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0e64e0d7a7
2 changed files with 22 additions and 20 deletions
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@ -238,37 +238,35 @@ struct HUB75_I2S_CFG {
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*/
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*/
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enum clk_speed {HZ_8M=8000000, HZ_10M=10000000, HZ_15M=15000000, HZ_20M=20000000};
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enum clk_speed {HZ_8M=8000000, HZ_10M=10000000, HZ_15M=15000000, HZ_20M=20000000};
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// Structure Variables
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/**
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//
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* GPIO pins mapping
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// Members must be in order of declaration or it breaks Arduino compiling due to strict checking.
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*/
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//
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struct i2s_pins{
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int8_t r1, g1, b1, r2, g2, b2, a, b, c, d, e, lat, oe, clk;
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} gpio;
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// Matrix driver chip type - default is a plain shift register
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shift_driver driver;
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// I2S clock speed
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clk_speed i2sspeed;
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// physical width of a single matrix panel module (in pixels, usually it is 64 ;) )
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// physical width of a single matrix panel module (in pixels, usually it is 64 ;) )
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uint16_t mx_width;
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uint16_t mx_width;
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// physical height of a single matrix panel module (in pixels, usually almost always it is either 32 or 64)
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// physical height of a single matrix panel module (in pixels, usually almost always it is either 32 or 64)
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uint16_t mx_height;
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uint16_t mx_height;
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// number of chained panels regardless of the topology, default 1 - a single matrix module
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// number of chained panels regardless of the topology, default 1 - a single matrix module
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uint16_t chain_length;
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uint16_t chain_length;
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// GPIO Mapping
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struct i2s_pins{ int8_t r1, g1, b1, r2, g2, b2, a, b, c, d, e, lat, oe, clk; } gpio;
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// Minimum refresh / scan rate needs to be configured on start due to LSBMSB_TRANSITION_BIT calculation in allocateDMAmemory()
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// Matrix driver chip type - default is a plain shift register
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uint16_t min_refresh_rate;
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shift_driver driver;
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// How many clock cycles to blank OE before/after LAT signal change, default is 1 clock
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uint8_t latch_blanking;
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// use DMA double buffer (twice as much RAM required)
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// use DMA double buffer (twice as much RAM required)
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bool double_buff;
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bool double_buff;
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// I2S clock speed
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clk_speed i2sspeed;
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// How many clock cycles to blank OE before/after LAT signal change, default is 1 clock
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uint8_t latch_blanking;
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/**
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/**
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* I2S clock phase
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* I2S clock phase
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* 0 - data lines are clocked with negative edge
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* 0 - data lines are clocked with negative edge
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@ -285,6 +283,10 @@ struct HUB75_I2S_CFG {
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*/
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*/
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bool clkphase;
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bool clkphase;
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// Minimum refresh / scan rate needs to be configured on start due to LSBMSB_TRANSITION_BIT calculation in allocateDMAmemory()
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uint8_t min_refresh_rate;
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// struct constructor
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// struct constructor
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HUB75_I2S_CFG (
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HUB75_I2S_CFG (
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uint16_t _w = MATRIX_WIDTH,
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uint16_t _w = MATRIX_WIDTH,
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@ -306,8 +308,8 @@ struct HUB75_I2S_CFG {
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chain_length(_chain),
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chain_length(_chain),
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gpio(_pinmap),
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gpio(_pinmap),
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driver(_drv),
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driver(_drv),
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i2sspeed(_i2sspeed),
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double_buff(_dbuff),
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double_buff(_dbuff),
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i2sspeed(_i2sspeed),
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latch_blanking(_latblk),
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latch_blanking(_latblk),
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clkphase(_clockphase),
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clkphase(_clockphase),
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min_refresh_rate(_min_refresh_rate)
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min_refresh_rate(_min_refresh_rate)
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@ -30,7 +30,7 @@
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#include <Fonts/FreeSansBold12pt7b.h>
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#include <Fonts/FreeSansBold12pt7b.h>
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#endif
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#endif
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#include <iostream>
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//#include <iostream>
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struct VirtualCoords
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struct VirtualCoords
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{
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{
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